Data Forest

Data Forest

Supercomputing has traditionally been used to solve two main types of problems, problems for which computational requirement the storage requirement exceed what is available in a single system. Traditionally, massively parallel processing systems have been developed to solve these problems by providing additional computation and storage resources by replication. Unfortunately, parallel machines or clusters have several drawbacks that make them unsuitable for some applications. For example, (1) parallel machines are difficult to program, (2) parallel machines are not portable, and (3) parallel machines cannot be easily customized to a particular task or set of tasks.

The Data Forest Supercomputer provides the memory capability of a traditionally massively parallel processing system with specialized memories such as content addressable memories (CAMs), highly customizable heterogeneous processing capabilities using reprogrammable computational fabrics, and embedded processors that is portable enough to fit in the back of a hummer.

The Data Forest Compiler makes the power of the Data Forest Supercomputer available to the user by providing a combined Standard Query Language (SQL) / MATLAB interface to the system. Users may create queries to locate data using SQL and use MATLAB programs to interpret and further refine the resulting data. The Data Forest Compiler maps the combined SQL and MATLAB program onto the heterogeneous computing resources that include both custom hardware and instructions for the embedded processors.

To evaluate the effectiveness of this approach versus traditional data mining and analysis techniques, a quantitative performance metric is described. This metric relates the number of person hours required between the Data Forest approach and other techniques such as using disk based data base systems, MATLAB programs running on single processor systems, manual hardware design techniques, and so on. The Data Forest approach is expected to show a significant improvement over these techniques.

Related Publications

•Y. Yu, R. R. Hoare, and A. K. Jones, A CAM-based Intrusion Detection System for Single-packet Attack Detection, in Proc. of the Reconfigurable Architecture Workshop (RAW), 2008.
•J. M. Lucas, R. Hoare, I. S. Kourtev, A. K. Jones, “Technology Mapping for Field Programmable Fate Arrays using Content-Addressable Memory (CAM),” Journal of Microprocessors and Microsystems - Vol. 30, No. 7, November, 2006, pp. 445-456.

•Y. Yu, R. Hoare, and A. K. Jones, “A Unique Hybrid Encoding Scheme for Efficient Range Matching in Ternary Content Addressable Memory,” IEE Proceedings on Circuits, Devices & Systems - in review since August 2006.

•J. Lucas, R. Hoare, I. Kourtev, and A. K. Jones, “LURU2: Optimizing Technology Mapping for FPGAs Using CAMs,” IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), 2005, pp. 293-294.

•J. Lucas, R. Hoare, I. Kourtev, and A. Jones, “LURU: Global Scope FPGA Technology Mapping with Content-Addressable Memories,” in Proceeedings of the International Conference on Electronics, Circuits, and Systems (ICECS), Tel Aviv, Isreal, December 2004. [ pdf ]

•A. Jones, A. Nayak, and P. Banerjee, “Parallel Implementation of Matrix and Signal Processing Libraries on FPGAs,” International Conference on Parallel and Distributed Computing and Systems (PDCS), Anaheim, CA, August 2001.

•P. Banerjee, N. Shenoy, A. Choudhary, S. Hauck, C. Bachmann, M. Chang, M. Haldar, P. Joisha, A. Jones, A. Kanhare, A. Nayak, S. Periyacheri, and M. Walkden, “MATCH: A MATLAB Compilation Environment for Configurable Computing Systems,” International Symposium on Field-Programmable Custom Computing Machines (FCCM), Napa, CA, 2000.

•S. Periyacheri, A. Jones, A. Nayak, D. Zaretsky, P. Banerjee, N. Shenoy, and A. Choudhary. “Library Functions in Reconfigurable Hardware for Matrix and Signal Processing Operations in MATLAB,” International Conference on Parallel and Distributed Computing and Systems (PDCS 1999), Cambridge, MA, November, 1999.