ECE351 Digital Systems Design

Spring 2015

ECE 351 for the Spring 2015 semester has been officially ended. In the following, please find the final project demos from some of the student groups of this course. Enjoy!

Dance game on FPGA

 

Pong game on FPGA

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Instructor

• Dr. Wei Gao
• Lectures: TR 9:40am-10:55am, 405 Min Kao
• Office hours: TR 11:00am - 12:00pm, 302 Min Kao
• Email: weigao (at) utk (dot) edu  (please replace (at) with @ and (dot) with .)
• Phone: 865-974-3984

Course Materials

• Textbook - The Designer's Guide to VHDL

• Author: Peter J. Ashenden
• Publisher: Morgan Kaufmann; 3rd edition

• Syllabus

• Schedule
• Course policies

• Lab: 224 Min kao

• Lab hours: M 12:30pm-3:00pm, F 3:30pm-6:00pm

Teaching Assistant

• Joey Allen
• TA will help students solve lab and programming problems

Grading

• Lab: 25% (4 labs)
• Course project: 35%. Proposal: 5%, midterm presentation: 7%, final presentation: 8%, final report 15%
• Midterm exam: 15%.
• Final exam: 20%.
• Participation: 5% .