ECE351 Digital Systems Design

Spring 2017

Note: Please check this page often for announcements, updates and changes, including all assignments.

Instructor

• Dr. Wei Gao
• Lectures: TR 9:40am-10:55am, 405 Min Kao
• Office hours: TR 11:00am - 12:00pm, 353 Min Kao
• Email: weigao (at) utk (dot) edu  (please replace (at) with @ and (dot) with .)
• Phone: 865-974-3984

Course Materials

• Textbook - The Designer's Guide to VHDL

• Author: Peter J. Ashenden
• Publisher: Morgan Kaufmann; 3rd edition

• Syllabus

• Schedule
• Course policies

• Lab: 224 Min kao

• Lab hours: TBD

Teaching Assistant

• Sagarvarma Sayyaparaju
• TA will help students solve lab and programming problems

Grading

• Lab: 25% (4 labs)
• Course project: 35%. Proposal: 5%, midterm presentation: 7%, final presentation: 8%, final report 15%
• Midterm exam: 15%.
• Final exam: 20%.
• Participation: 5% .